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IS61DDP2B41M18C Datasheet - ISSI

IS61DDP2B41M18C 18Mb DDR-IIP CIO SYNCHRONOUS SRAM

* 512Kx36 and 1Mx18 configuration available. * On-chip Delay-Locked Loop (DLL) for wide data valid window. * Common I/O read and write ports. * Synchronous pipeline read with self-timed late write operation. * Double Data Rate (DDR) interface for read and write input ports. .

IS61DDP2B41M18C Datasheet (1.05 MB)

Preview of IS61DDP2B41M18C PDF

Datasheet Details

Part number:

IS61DDP2B41M18C

Manufacturer:

ISSI

File Size:

1.05 MB

Description:

18mb ddr-iip cio synchronous sram.

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IS61DDP2B41M18C 18Mb DDR-IIP CIO SYNCHRONOUS SRAM ISSI

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