IS61DDP2B451236C Datasheet, Sram, ISSI

✔ IS61DDP2B451236C Features

DESCRIPTION
512Kx36 and 1Mx18 configuration available.
On-chip Delay-Locked Loop (DLL) for wide data valid window.
Common I/O read and write ports.
Synchronous

✔ IS61DDP2B451236C Application

where the failure or malfunction of the product can reasonably be expected to cause failure of the life supp

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IS61DDP2B451236C

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ISSI

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📄 Datasheet

Description:

18mb ddr-iip cio synchronous sram. * 512Kx36 and 1Mx18 configuration available. * On-chip Delay-Locked Loop (DLL) for wide data valid window. * Common I/O read and wri

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IS61DDP2B451236C 18Mb DDR-IIP CIO SYNCHRONOUS SRAM ISSI