* Integrated SAW delay line; Output of 15 to 700 MHz
* Low phase jitter < 0.5 ps rms typical (12kHz to 20MHz or 50kHz to 80MHz)
* LVPECL clock output (CML and LVDS options available)
* Pin-selectable PLL divider ratios support FEC ratios
* M2080/85: OTU1 (255/238) and O
M2086
Integrated Circuit Solution Inc
501.80 KB
Vcso fec pll with autoswitch for sonet/otn.
Integrated Circuit Systems, Inc.
Preliminary Information
VCSO FEC PLL WITH AUTOSWITCH FOR SONET/OTN
PIN ASSIGNMENT (9 x 9 mm SMT)
FIN_SEL1 GND P_SEL.
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