AV9170-01CN8 Datasheet - Integrated Circuit Systems

AV9170-01CN8 Clock Synchronizer and Multiplier

The AV9170 generates an output clock which is synchronized to a given continuous input clock with zero delay (±1ns at 5V VDD). Using ICSs proprietary phase-locked loop (PLL) analog CMOS technology, the AV9170 is useful for regenerating clocks in high speed systems where skew is a major concern. By .

AV9170-01CN8 Features

* On-chip Phase-Locked Loop for clocks synchronization Synchronizes frequencies up to 107 MHz (output) @ 5.0V ±1ns skew (max) between input & output clocks @ 5.0V Can recover poor duty cycle clocks CLK1 to CLK2 skew controlled to within ±1ns @ 5.0V 3.0 - 5.5V supply range Low pow

AV9170-01CN8_IntegratedCircuitSystems.pdf