Description
Integrated Circuit Systems, Inc.Product Data Sheet M2006-12A VCSO BASED FEC CLOCK PLL WITH HITLESS SWITCHING PIN ASSIGNMENT (9 x 9 mm SMT) FIN_SEL.
The M2006-12A is a VCSO (Voltage Controlled SAW Oscillator) based clock generator PLL designed for clock frequency translation and jitter attenuation.
Features
* Reduced intrinsic output jitter and improved power supply noise rejection compared to M2006-12
* Similar to the M2006-02A - and pin-compatible - but adds Hitless Switching and Phase Build-out functions
* Includes APC pin for Phase Build-out function (for absorption of the input phase c
Applications
* these settings can be used to optimize phase detector frequency or to actively change PLL loop bandwidth.
* M2006-12A Datasheet Rev 1.0 Integrated Circuit Systems, Inc.
* 3 of 10 Networking & Communications
* Revised 28Jul2004 w w w. i c s t . c o m
* tel (508) 852-5400
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