MK74ZD133 Datasheet - Integrated Circuit Systems

MK74ZD133 PLL and 32-Output Clock Driver

The MK74ZD133 is a monolithic CMOS high speed clock driver that includes an on-chip PLL (Phase Locked Loop). Ideal for communications and other systems that require a large number of high-speed clocks, the unique combination of PLL and 32 outputs can eliminate oscillators and multiple low skew buffe.

MK74ZD133 Features

* 56 pin SSOP or 64 pin LQFP package

* On-chip PLL generates output clocks up to 80 MHz (SSOP) or 133.33 MHz (LQFP)

* Zero delay plus multiplier function

* 32 low-skew outputs can eliminate chip-to-chip skew concerns in systems with less than 33 clocks

* Outpu

MK74ZD133 Datasheet (116.40 KB)