IDT2308A Datasheet - Integrated Device Technology

IDT2308A 3.3V ZERO DELAY CLOCK MULTIPLIER

The IDT2308A is a high-speed phase-lock loop (PLL) clock multiplier. It is designed to address high-speed clock distribution and multiplication applications. The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz..

IDT2308A Features

* IDT2308A

* Phase-Lock Loop Clock Distribution for Applications ranging from 10MHz to 133MHz operating frequency

* Distributes one clock input to two banks of four outputs

* Separate output enable for each output bank

* External feedback (FBK) pin is used to synchro

IDT2308A_IntegratedDeviceTechnology.pdf