IDT2305A Datasheet (Renesas) - 3.3V ZERO DELAY CLOCK BUFFER

IDT2305A, 3.3V ZERO DELAY CLOCK BUFFER

The IDT2305A is a high-speed phase-lock loop (PLL) clock buffer, designed to address high-speed clock distribution applications.

The zero delay is achieved by aligning the phase between the incoming clock and the output clock, operable within the range of 10 to 133MHz.

The IDT2305A is an 8-pin vers

IDT2305A Features

* Phase-Lock Loop Clock Distribution

* 10MHz to 133MHz operating frequency

* Distributes one clock input to one bank of five outputs

* Zero Input-Output Delay

* Output Skew < 250ps

* Low jitter