IDT23S05E Datasheet (Integrated Device) - 3.3V ZERO DELAY CLOCK BUFFER

IDT23S05E, 3.3V ZERO DELAY CLOCK BUFFER

FUNCTIONAL BLOCK DIAGRAM 8 CLKOUT REF 1 PLL Control Logic 3 CLK1 2 CLK2 5 7 CLK3 CLK4 The IDT logo is a registered trademark of Integrated Device Technology, Inc.

COMMERCIAL AND INDUSTRIAL TEMPERATURE RANGES 1 c 2003 Integrated Device Technology, Inc.

OCTOBER 2003 DSC - 6398/5 IDT23

IDT23S05E Features

* Phase-Lock Loop Clock Distribution 10MHz to 200MHz operating frequency Distributes one clock input to one bank of five outputs Zero Input-Output Delay Output Skew < 250p