IDT70V3399S Datasheet - Integrated Device Technology

IDT70V3399S SYNCHRONOUS DUAL-PORT STATIC RAM

Dual-Port RAM. The memory array utilizes Dual-Port memory cells to allow simultaneous access of any address from both ports. Registers on control, data, and address inputs provide minimal setup and hold times. The timing latitude provided by this approach allows systems to be designed with very sh.

www.DataSheet4U.com HIGH-SPEED 3.3V 256/128K x 18 IDT70V3319/99S SYNCHRONOUS DUAL-PORT STATIC RAM WITH 3.3V OR 2.5V INTERFACE Data input, address, byte enable and control registers Self-timed write allows fast cycle time Separate byte controls for multiplexed bus and bus matching compatibility Dual Cycle Deselect (DCD) for Pipelined Output mode LVTTL- compatible, single 3.3V (±150mV) power supply for core LVTTL compatible, selectable 3.3V (±150mV) or 2.5V (±100mV) power supp.

IDT70V3399S Features

* compliant to IEEE 1149.1

* Due to limited pin count, JTAG is not supported on the 128-pin TQFP package. Features:

* True Dual-Port memory cells which allow simultaneous access of the same memory location High-speed data access

* Commercial: 3.6n

IDT70V3399S Datasheet (309.20 KB)