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V103 TRIPLE 10-BIT LVDS TRANSMITTER

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Description

V103 TRIPLE 10-BIT LVDS TRANSMITTER FOR VIDEO General .
The V103 LVDS display interface transmitter is primarily designed to support pixel data transmission between a video processing engine and a digital v.

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Datasheet Specifications

Part number
V103
Manufacturer
Integrated Device Technology
File Size
178.87 KB
Datasheet
V103_IntegratedDeviceTechnology.pdf
Description
TRIPLE 10-BIT LVDS TRANSMITTER

Features

* Pin compatible with THine THC63LVD103
* Wide pixel clock range: 8 - 135 MHz
* Supports a wide range of video and graphics modes including VGA, SVGA, XGA, SXGA, SXGA+, NTSC, PAL, SDTV, and HDTV up to 1080I or 720P
* Internal PLL requires no external loop filter

Applications

* It can also be used in other high-bandwidth parallel data applications and provides a low EMI interconnect over a low cost, low bus width cable up to several meters in length. The V103 converts 35 bits of CMOS/TTL data, clocked on the rising or falling edge of an input clock (selectable), into six

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