IDT74FCT88915TT100 Datasheet (Integrated Device) - LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

IDT74FCT88915TT100, LOW SKEW PLL-BASED CMOS CLOCK DRIVER (WITH 3-STATE)

The IDT54/74FCT88915TT uses phase-lock loop technology to lock the frequency and phase of outputs to the input reference clock.

It provides low skew clock distribution for high performance PCs and workstations.

One of the outputs is fed back to the PLL at the FEEDBACK input resulting in essentiall

IDT74FCT88915TT100 Features

* 0.5 MICRON CMOS Technology

* Input frequency range: 10MHz

* f2Q Max. spec (FREQ_SEL = HIGH)

* Max. output frequency: 133MHz

* Pin and function compatible with MC88915T

* 5 non-inverting outputs, one inverting output, one 2x output, one ÷ 2 output; a