IS61DDB42M18A - 36Mb DDR-II (Burst 4) CIO SYNCHRONOUS SRAM
* 1Mx36 and 2Mx18 configuration available.
* On-chip delay-locked loop (DLL) for wide data valid window.
* Common I/O read and write ports.
* Synchronous pipeline read with late write operation.
* Double Data Rate (DDR) interface for read and write input ports.
* Fixed 4-bit
