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IS61DDPB41M18A

18Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM

IS61DDPB41M18A Features

* DESCRIPTION

* 512Kx36 and 1Mx18 configuration available.

* On-chip Delay-Locked Loop (DLL) for wide data valid window.

* Common I/O read and write ports.

* Synchronous pipeline read with self-timed late write operation.

* Double Data Rate (DDR) interface for read and write inpu

IS61DDPB41M18A General Description


* 512Kx36 and 1Mx18 configuration available.
* On-chip Delay-Locked Loop (DLL) for wide data valid window.
* Common I/O read and write ports.
* Synchronous pipeline read with self-timed late write operation.
* Double Data Rate (DDR) interface for read and write input ports.
.

IS61DDPB41M18A Datasheet (560.31 KB)

Preview of IS61DDPB41M18A PDF

Datasheet Details

Part number:

IS61DDPB41M18A

Manufacturer:

Integrated Silicon Solution

File Size:

560.31 KB

Description:

18mb ddr-iip(burst 4) cio synchronous sram.
IS61DDPB41M18A/A1/A2 IS61DDPB451236A/A1/A2 1Mx18, 512Kx36 18Mb DDR-IIP(Burst 4) CIO SYNCHRONOUS SRAM (2.5 Cycle Read Latency) ADVANCED INFORMATION JU.

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IS61DDPB41M18A 18Mb DDR-IIPBurst CIO SYNCHRONOUS SRAM Integrated Silicon Solution

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