IS61DDPB24M18C1 Features
* 2Mx36 and 4Mx18 configuration available.
* Common I/O read and write ports.
* Max. 567 MHz clock for high bandwidth
* Synchronous pipeline read with self-timed late write operation.
* Double Data Rate (DDR) interface for read and write input ports.
* 2.5 cycle read latency.
Datasheet Details
IS61DDPB24M18C1, IS61DDPB24M18C
ISSI
851.41 KB
72mb ddr-iip cio synchronous sram.
This datasheet PDF includes multiple part numbers: IS61DDPB24M18C1, IS61DDPB24M18C.
Please refer to the document for exact specifications by model.
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