QS5LV919160J - 3.3V LOW SKEW CMOS PLL CLOCK DRIVER

Integrated Device Technology

QS5LV919160J Datasheet Preview — Preview of QS5LV919160J PDF

Datasheet Details

Part number	QS5LV919160J
Manufacturer	Integrated Device Technology
File Size	98.35 KB
Description	3.3V LOW SKEW CMOS PLL CLOCK DRIVER
Datasheet	QS5LV919160J_IntegratedDeviceTechnology.pdf

QS5LV919160J Product details

Description

QS5LV919 3.3V operation JEDEC compatible LVTTL level outputs Clock inputs are 5V tolerant < 300ps output skew, Q0 Q4 2xQ output, Q outputs, Q output, Q/2 output Outputs 3-state and reset while OE/RST low PLL disable feature for low frequency testing Internal loop filter RC network Functional equivalent to MC88LV915, IDT74FCT388915 Positive or negative edge

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Published: Apr 16, 2005 |