28F008SA Datasheet - Intel

28F008SA 8-MBIT (1-MBIT x 8) FlashFile MEMORY

Symbol A0 *A19 DQ0 *DQ7 Type INPUT INPUT OUTPUT Name and Function ADDRESS INPUTS for memory addresses Addresses are internally latched during a write cycle DATA INPUT OUTPUTS Inputs data and commands during Command User Interface write cycles outputs data during memory array Status R.

28F008SA 8-MBIT (1-MBIT x 8) FlashFile TM MEMORY Extended Temperature Specifications Included Y High-Density Symmetrically-Blocked Architecture Sixteen 64-Kbyte Blocks Extended Cycling Capability 100 000 Block Erase Cycles 1 6 Million Block Erase Cycles per Chip Automated Byte Write and Block Erase Command User Interface Status Register System Performance Enhancements RY BY Status Output Erase Suspend Capability Y Deep Power-Down Mode 0 20 mA ICC Typical Very High-Performance Read 85 ns Maxim.

28F008SA Features

* associated with altering memory

28F008SA Datasheet (466.61 KB)