28F008SA-L Datasheet - Intel

28F008SA-L 8-MBIT (1 MBIT x 8) FLASHFILETM MEMORY

Symbol A0 *A19 DQ0 *DQ7 Type INPUT INPUT OUTPUT Name and Function ADDRESS INPUTS for memory addresses Addresses are internally latched during a write cycle DATA INPUT OUTPUTS Inputs data and commands during Command User Interface write cycles outputs data during memory array Status R.

28F008SA-L 8-MBIT (1 MBIT x 8) FLASHFILE TM MEMORY Y High-Density Symmetrically-Blocked Architecture Sixteen 64-Kbyte Blocks Low-Voltage Operation b 3 3V g 0 3V or 5 0V g 10% VCC Extended Cycling Capability 10 000 Block Erase Cycles 160 000 Block Erase Cycles per Chip Automated Byte Write and Block Erase Command User Interface Status Register System Performance Enhancements RY BY Status Output Erase Suspend Capability Y High-Performance Read 200 ns Maximum Access Time Deep Power-Down Mode 0 2.

28F008SA-L Features

* igent identifier are accessed vi

28F008SA-L Datasheet (437.93 KB)