F28F010 Datasheet - Intel

F28F010 1024K (128K x 8) CMOS FLASH MEMORY

Name and Function ADDRESS INPUTS for memory addresses Addresses are internally latched during a write cycle DATA INPUT OUTPUT Inputs data during memory write cycles outputs data during memory read cycles The data pins are active high and float to tri-state OFF when the chip is deselected or the outp.

28F010 1024K (128K x 8) CMOS FLASH MEMORY Y Flash Electrical Chip-Erase 1 Second Typical Chip-Erase Y Quick Pulse Programming Algorithm 10 ms Typical Byte-Program 2 Second Chip-Program Y 100 000 Erase Program Cycles Y 12 0V g5% VPP Y High-Performance Read 65 ns Maximum Access Time Y CMOS Low Power Consumption 10 mA Typical Active Current 50 mA Typical Standby Current 0 Watts Data Retention Power Y Integrated Program Erase Stop Timer Y Command Register Architecture for Microprocessor Microcontr.

F28F010 Features

* g10% VCC Tolerance Maximum Latch-Up Immunity through EPI Processing Y ETOXTM Nonvolatile Flash Technology EPROM-Compatible Process Base High-Volume Manufacturing Experience Y JEDEC-Standard Pinouts 32-Pin Plastic Dip 32-Lead PLCC 32-Lead TSOP (See Packaging Spec Order 231369) Y Extended Temperature

F28F010-Intel.pdf