82C55A Datasheet - Intersil Corporation

82C55A CMOS Programmable Peripheral Interface

SYMBOL TYPE VCC GND D0-D7 RESET I/O I CS I RD WR A0-A1 I I I PA0-PA7 PB0-PB7 PC0-PC7 I/O I/O I/O DESCRIPTION VCC: The +5V power supply pin. A 0.1F capacitor between VCC and GND is recommended for decoupling. GROUND DATA BUS: The Data Bus lines are bidirectional three-state pins connected.

DATASHEET 82C55A CMOS Programmable Peripheral Interface The 82C55A is a high performance CMOS version of the industry standard 8255A and is manufactured using a self-aligned silicon gate CMOS process (Scaled SAJI IV). It is a general purpose programmable I/O device which may be used with many different microprocessors. There are 24 I/O pins which may be individually programmed in 2 groups of 12 and used in 3 major modes of operation. The high performance and industry standard configuration of t.

82C55A Features

* Pb-Free Plus Anneal Available (RoHS Compliant) (See Ordering Info)

* Pin Compatible with NMOS 8255A

* 24 Programmable I/O Pins

* Fully TTL Compatible

* High Speed, No “Wait State” Operation with 5MHz and 8MHz 80C86 and 80C88

* Direct Bit Set/Reset Ca

82C55A Datasheet (698.59 KB)