CD40174BMS Overview
The CLOCK and CLEAR inputs are mon to all six units. Data is transferred to the Q outputs on the positive going transition of the clock pulse. All six flip-flops are simultaneously reset by a low level on the CLEAR input.
CD40174BMS Key Features
- High Voltage Type (20V Rating)
- 5V, 10V and 15V Parametric Ratings
- Standardized, Symmetrical Output Characteristics
- 100% Tested for Quiescent Current at 20V
- Maximum Input Current of 1A at 18V Over Full Package Temperature Range, 100nA at 18V and +25oC
- Noise Margin (Over full Package Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
- Meets All Requirements of JEDEC Tentative Standard No. 13A, “Standard Specifications for Description of ‘B’ Series CMOS
