CD4076BMS Datasheet - Intersil Corporation

CD4076BMS, CMOS 4 -Bit D-Type Registers

CD4076BMS December 1992 CMOS 4 -Bit D-Type Registers Pinout CD4076BMS TOP VIEW M N Q1 Q2 Q3 Q4 CLOCK VSS 1 2 3 4 5 6 7 8 16 VDD 15 RESET 14 DATA 1 13.
of ‘B’ Series CMOS Devices” OUTPUT DISABLE Functional Diagram DATA INPUT DISABLE G1 9 14 D1 13 D2 12 4D - TYPE FLIP-FLOPS WITH AND-OR LOGIC 4 Q2 5 1.

Features

* High Voltage Type (20V Rating)
* Three State Outputs
* Input Disabled Without Gating the Clock
* Gated Output Control Lines for Enabling or Disabling the Outputs
* Standardized Symmetrical Output Characteristics
* 100% Tested for Quiescent Current at

CD4076BMS_IntersilCorporation.pdf