CD4085BMS Datasheet - Intersil Corporation

CD4085BMS - CMOS Dual 2 Wide 2 Input AND-OR-INVERT Gate

of ‘B’ Series CMOS Devices” A1 1 B1 2 E1 = INHI + A1B1 + C1D1 3 E2 = INH2 + A2B2 + C2D2 4 A2 5 B2 6 VSS 7 14 VDD 13 D1 12 C1 11 INHIBIT 2 10 INHIBIT 1 9 D2 8 C2 Functional Diagram INHIBIT 1 10 Description CD4085BMS contains a pair of AND-OR-INVERT gates, each consisting of two 2 input AND gates .

CD4085BMS Features

* High Voltage Type (20V Rating)

* Medium Speed Operation - tPHL = 90ns - tPLH = 125ns (Typ.) at 10V

* Individual Inhibit Controls

* 5V, 10V and 15V Parametric Ratings

* Standardized Symmetrical Output Characteristics

* 100% Tested for Quiescent Curren

CD4085BMS_IntersilCorporation.pdf