CDP1833 CMOS 7-Bit Latch and Decoder Memory Interface

Intersil

Description

www.DataSheet4U.com CDP1883, CDP1883C March 1997 CMOS 7-Bit Latch and Decoder Memory Interfaces .
The CDP1883 is a CMOS 7-bit memory latch and decoder circuit intended for use in CDP1800-series microprocessor systems.

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Datasheet Specifications

Part number: CDP1833
Manufacturer: Intersil
File Size: 61.62 KB
Datasheet: CDP1833_Intersil.pdf
Description: CMOS 7-Bit Latch and Decoder Memory Interface

Features

* Performs Memory Address Latch and Decoder Functions Multiplexed or Non-Multiplexed
* Interfaces Directly with the CDP1800-Series Microprocessors
* Allows Decoding for Systems Up to 32K Bytes Ordering Information 5V 10V TEMP. RANGE -40oC to +85oC PACKAGE PDIP PKG. NO. E20.3

Applications

* The CDP1833 is compatible with CDP1800-series microprocessors operating at maximum clock frequency. The CDP1883 and CDP1883C are functionally identical. They differ in that the CDP1883 has a recommended operating voltage range of 4V to 10.5V and the C version has a recommended operating voltage ran

CDP1833 Distributors

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CDP1833 CMOS 7-Bit Latch and Decoder Memory Interface Intersil

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