3256A In-System Programmable High Density PLD

Lattice Semiconductor

Description

ispLSI 3256A ® In-System Programmable High Density PLD .
The ispLSI 3256A is a High-Density Programmable Logic Device containing 384 Registers, 128 Universal I/O pins, five Dedicated Clock Input Pins, eight.

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Datasheet Specifications

Part number: 3256A
Manufacturer: Lattice Semiconductor
File Size: 163.45 KB
Datasheet: 3256A_LatticeSemiconductor.pdf
Description: In-System Programmable High Density PLD

Features

* HIGH-DENSITY PROGRAMMABLE LOGIC
* 128 I/O Pins
* 11000 PLD Gates
* 384 Registers
* High Speed Global Interconnect
* Wide Input Gating for Fast Counters, State Machines, Address Decoders, etc.
* Small Logic Block Size for Random Logic

Applications

* for the new model. The ispLSI 3256A supports all IEEE 1149.1 mandatory instructions, which include BYPASS, EXTEST and SAMPLE. Key Attributes of the ispLSI 3256A Attribute Twin GLBs Registers I/O Pins Global Clocks Global OE Test OE Quantity 32 384 128 5 2 1 Table 1-0003A/3256 3 Specifications isp

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3256A In-System Programmable High Density PLD Lattice Semiconductor

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