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ISPCLOCK5510, ISPCLOCK5300S In-System Programmable Zero-Delay

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Description

ispClock 5300S Family ™ In-System Programmable, Zero-Delay Universal Fan-Out Buffer, Single-Ended October 2007 Preliminary Data Sheet DS1010 .
The ispClock5300S is an in-system-programmable zero delay universal fan-out buffer for use in clock distribution applications.

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This datasheet PDF includes multiple part numbers: ISPCLOCK5510, ISPCLOCK5300S. Please refer to the document for exact specifications by model.
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Datasheet Specifications

Part number
ISPCLOCK5510, ISPCLOCK5300S
Manufacturer
Lattice Semiconductor
File Size
1.28 MB
Datasheet
ISPCLOCK5300S_LatticeSemiconductor.pdf
Description
In-System Programmable Zero-Delay
Note
This datasheet PDF includes multiple part numbers: ISPCLOCK5510, ISPCLOCK5300S.
Please refer to the document for exact specifications by model.

Features

* Four Operating Configurations
* Zero delay buffer Zero delay and non-zero delay buffer Dual non-zero delay buffer Non-zero delay buffer with output divider
* Up to +/- 5ns skew range
* Coarse and fine adjustment modes
* Up to Three Cloc

Applications

* Circuit board common clock distribution PLL-based frequency generation High fan-out clock buffer Zero-delay clock buffer
* Fully Integrated High-Performance PLL
* Programmable lock detect Three “Power of 2”

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