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LC4032ZE - 1.8V In-System Programmable Ultra Low Power PLDs

Datasheet Summary

Features

  • High Performance.
  • fMAX = 260MHz maximum operating frequency.
  • tPD = 4.4ns propagation delay.
  • Up to four global clock pins with programmable clock polarity control.
  • Up to 80 PTs per output.
  • Ease of Design.
  • Flexible CPLD macrocells with individual clock, reset, preset and clock enable controls.
  • Up to four global OE controls.
  • Individual local OE control per I/O pin.
  • Excellent First-Time-FitTM and refit.
  • Wide.

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Datasheet preview – LC4032ZE

Datasheet Details

Part number LC4032ZE
Manufacturer Lattice Semiconductor
File Size 4.80 MB
Description 1.8V In-System Programmable Ultra Low Power PLDs
Datasheet download datasheet LC4032ZE Datasheet
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Full PDF Text Transcription

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ispMACH ® 4000ZE Family February 2012 Features  High Performance • fMAX = 260MHz maximum operating frequency • tPD = 4.4ns propagation delay • Up to four global clock pins with programmable clock polarity control • Up to 80 PTs per output  Ease of Design • Flexible CPLD macrocells with individual clock, reset, preset and clock enable controls • Up to four global OE controls • Individual local OE control per I/O pin • Excellent First-Time-FitTM and refit • Wide input gating (36 input logic blocks) for fast counters, state machines and address decoders  Ultra Low Power • Standby current as low as 10µA typical • 1.8V core; low dynamic power • Operational down to 1.
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