MACH4-96 Datasheet (Lattice) - High-Performance EE CMOS Programmable Logic

MACH4-96, High-Performance EE CMOS Programmable Logic

1 FINAL MACH 4 FAMILY COM’L: -15 IND: -18 Lattice Semiconductor MACH4-96/96-15 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS x 144 Pins in PQFP x 96 Macrocells x 15 ns tPD Commercial, 18 ns tPD Industrial x 47.6 MHz fCNT x 102 Inputs with pull-up resistors x 96 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs x 96 Flip-ﬂops x Up to 20 product terms per macrocell, with XOR x Flexible clocking MACH 4 Family x x x x x Four global clock pins with select

MACH4-96 Features

* The M4-96/96 consists of six PAL® blocks interconnected by a programmable central switch matrix. The central switch matrix connects the PAL blocks to each other and to all input pins, providing a high degree of connectivity between the PAL blocks. This allows designs to be placed and routed efﬁcien