MX25L12833F Datasheet - MACRONIX

MX25L12833F - 128M-BIT FLASH MEMORY

5 Table 1. Read performance Comparison5 3. PIN CONFIGURATIONS 6 4. PIN DESCRIPTION 6 5. BLOCK DIAGRAM 7 6. DATA PROTECTION 8 Table 2. Protected Area Sizes9 Table 3. 8K-bit Secured OTP Definition10 7. Memory Organization 11 Table 4. Memory Organization 11 8. DEVICE OPERATION 12 8-1. Quad Peripheral .

MX25L12833F Features

* Protocol Support - Single I/O, Dual I/O and Quad I/O

* Quad Peripheral Interface (QPI) available

* Support clock frequency up to 133MHz

* Program/Erase Suspend and Resume

* Additional 8K-bit secured OTP P/N: PM2517 MX25L12833F Contents 1. FEATURES 4 2. GEN

MX25L12833F-MACRONIX.pdf