MX30UF2G26AB - 1.8V 2G-bit NAND Flash Memory
7 Figure 1.
Logic Diagram 7 2-1.
ORDERING INFORMATION8 3.
PIN CONFIGURATIONS10 3-1.
PIN DESCRIPTIONS13 4.
BLOCK DIAGRAM15 5.
SCHEMATIC CELL LAYOUT AND ADDRESS ASSIGNMENT16 Table 1-1.
Address Allocation (for x8): MX30UFxG28AB 16 Table 1-2.
Address Allocation (for x16): MX30UFxG26AB 16 6.
DEVICE OPERA
