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CHD408LVW, CHD408LVS Datasheet - MIRA

CHD408LVW - 4M-Bit Low Power Asynchronous SRAM

The CHD408L is a family of low voltage, low power 4Mbit static RAMs organized as 512K-words by 8-bit, designed with Cascade’s patent pending SuperT-SRAM™ technology, fabricated with low-power 0.18µm process technology.

The CHD408LVS is designed specifically for low-power applications such as mobile

CHD408LVW Features

* Low power Low active and standby power for hand-held applications. Single power supply. 55ns or 70ns access time 100% compatible with JEDEC asynchronous SRAM. No clocks, no refresh. No timing restrictions. No special power-up sequence requirement. Direct TTL compatibility for all inputs a

CHD408LVS_MIRA.pdf

This datasheet PDF includes multiple part numbers: CHD408LVW, CHD408LVS. Please refer to the document for exact specifications by model.
CHD408LVW Datasheet Preview Page 2 CHD408LVW Datasheet Preview Page 3

Datasheet Details

Part number:

CHD408LVW, CHD408LVS

Manufacturer:

MIRA

File Size:

137.37 KB

Description:

4m-bit low power asynchronous sram.

Note:

This datasheet PDF includes multiple part numbers: CHD408LVW, CHD408LVS.
Please refer to the document for exact specifications by model.

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