Datasheet Details
Part number:
DSSHA1
Manufacturer:
File Size:
239.30 KB
Description:
Memory-Mapped SHA-1 Coprocessor
Features
* SHA-1 Computations Within 670 Clock Cycles (13.4µs at a Typical Frequency of 50MHz)
* Area Estimate is 102,256µm2 in TSMC CL018G (0.18µm Generic Process)
* Dedicated Hardware-Accelerated SHA-1 Engine for Generating MACs
* 64-Byte RAM for Message Input
* Five
DSSHA1, Memory-Mapped SHA-1 Coprocessor
The DSSHA1 coprocessor with 64-byte RAM is a synthesizable register transfer level (RTL) implementation of the FIPS 180-3 Secure Hash Algorithm (SHA-1), eliminating the need to develop software to perform the complex SHA-1 computation required for authenticating SHA-1 devices.
The DSSHA1 can compute
DSSHA1 Distributor
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