SY100E154 Datasheet (Micrel Semiconductor)

SY100E154, 5-BIT 2:1 MUX-LATCH

The SY10/100E154 offer five 2:1 multiplexers followed by latches with differential outputs, designed for use in new, high-performance ECL systems.

The two external Latch-Enable signals (LEN1, LEN2) are gated through a logical OR operation before use as control for the five latches.

When both LEN1 an

SY100E154 Features

* s 750ps max. LEN to output s Extended 100E VEE range of

* 4.2V to

* 5.5V s 700ps max. D to output s Differential outputs s Asynchronous Master Reset s Dual latch-enables s Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75KΩ input pulldown resistors s Fully com