SY100E155 Datasheet (Micrel Semiconductor)

SY100E155, 6-BIT 2:1 MUX-LATCH

The SY10/100E155 offer six 2:1 multiplexers followed by latches with single-ended outputs, designed for use in new, high-performance ECL systems.

The two external latch-enable signals (LEN1 and LEN2) are gated through a logical OR operation before use as control for the six latches.

When both LEN1 a

SY100E155 Features

* 750ps max. LEN to output Extended 100E VEE range of

* 4.2V to

* 5.5V 700ps max. D to output Single-ended outputs Asynchronous Master Reset Dual latch-enables Fully compatible with industry standard 10KH, 100K ECL levels Internal 75KΩ input pulldown resistors Fully compatible with Motor