SY100EL15L Datasheet | Micrel Semiconductor

FEATURES s 3.3V power supply s 50ps output-to-output skew s Low power s Synchronous enable/disable s Multiplexed clock input s 75KΩ internal input pull-down resistors s Available in 16-pin SOIC package PIN NAMES Pin CLK SCLK EN SEL VBB Q0-3 Function Differential Clock Inputs Synchronous Clock Input Synchronous Enable Clock Select Input Reference Output Differential Clock Outputs Precision Edge® DESCRIPTION The SY100EL15L is a low skew 1:4 clock distribution IC designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. If a single-ended input is to be used the VBB output should be connected to the CLK input and bypassed to ground via a 0.01µF capacitor. The VBB output is designed to act as the switching reference for the input of the EL15 under singleended input conditions. As a result, this pin can only source/sink up to 0.5m A of current. The EL15...