SY100EL15L Datasheet - Micrel Semiconductor

SY100EL15L 3.3V 1:4 CLOCK DISTRIBUTION

The SY100EL15L is a low skew 1:4 clock distribution IC designed explicitly for low skew clock distribution applications. The device can be driven by either a differential or single-ended ECL or, if positive power supplies are used, PECL input signal. If a single-ended input is to be used the VBB out.

SY100EL15L Features

* s 3.3V power supply s 50ps output-to-output skew s Low power s Synchronous enable/disable s Multiplexed clock input s 75KΩ internal input pull-down resistors s Available in 16-pin SOIC package PIN NAMES Pin CLK SCLK EN SEL VBB Q0-3 Function Differential Clock Inputs Synchronous Clock Input Synchro

SY100EL15L_MicrelSemiconductor.pdf