Description
m o .c U 4 t ™ 2Mb SYNCBURST e e h SRAM S a t a D .
MARKING
-5 -6 -7.
Operating Temperature Range Commerci.
Features
* . w w w
NOT RECOMENDED FOR NEW DESIGNS
2Mb: 128K x 18, 64K x 32/36 PIPELINED, SCD SYNCBURST SRAM
MT58L128L18P, MT58L64L32P, MT58L64L36P; MT58L128V18P, MT58L64V32P, MT58L64V36P
3.3V VDD, 3.3V or 2.5V I/O, Pipelined, SingleCycle Deselect
* Fast clock and OE# access times
* Single +3
Applications
* 100-pin TQFP package
* Low capacitive bus loading
* x18, x32, and x36 options available
OPTIONS
* Timing (Access/Cycle/MHz) 3.5ns/5ns/200 MHz 3.5ns/6ns/166 MHz 4.0ns/7.5ns/133 MHz 5ns/10ns/100 MHz
* Configurations 3.3V I/O 128K x 18 64K x 32 64K x 36 2.5V
