PDSP16318A Datasheet - Mitel Networks Corporation

PDSP16318A PDSP16256GC1R

The PDSP16318 is a Dual 20-bit Adder/Subtractor configured to support Complex Arithmetic. The device may be used with each of the adders allocated to real or imaginary data (e.g. Complex Conjugation), the entire device allocated to Real or Imaginary Data (e.g. Radix 2 Butterflys) or each of the adde.

PDSP16318/16318A PDSP16318/PDSP16318A Complex Accumulator Advance Information Supersedes version DS3708 - 2.4 September 1996 DS3708 - 3.1 November 1998 The PDSP16318/A contains two independent 20-bit Adder/Subtractors combined with accumulator registers and shift structures. The four port architecture permits full 20MHz throughout in FFT and filter applications. Two PDSP16318As combined with a single PDSP16112A Complex Multiplier provide a complete arithmetic solution for a Radix 2 DIT FFT But.

PDSP16318A Features

* s s s s s s s s s s s s s s Full 20MHz Throughout in FFT Applications Four Independent 16-bit I/O Ports 20-bit Addition or Accumulation Fully Compatible with PDSP16112 Complex Multiplier On Chip Shift Structures for Result Scaling Overflow Detection Independent Three-State Outputs and Clock Enable

PDSP16318A Datasheet (88.71 KB)