M2V28D40ATP-75 Datasheet, Dram, Mitsubishi

M2V28D40ATP-75 Features

• Dram - Vdd=Vddq=2.5V+0.2V - Double data rate architecture; two data transfers per clock cycle - Bidirectional, data strobe (DQS) is transmitted/received with data - Differential clock inputs

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Part number:

M2V28D40ATP-75

Manufacturer:

Mitsubishi

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1.19MB

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📄 Datasheet

Description:

128m double data rate synchronous dram. M2S28D20ATP is a 4-bank x 8388608-word x 4-bit, M2S28D30ATP is a 4-bank x 4194304-word x 8-bit, M2S28D40ATP is a 4-bank x 2097152-wor

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M2V28D40ATP-75

Mitsubishi

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M2V28S20ATP - 128M Synchronous DRAM (Mitsubishi)
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M2V28S30TP - 128M Synchronous DRAM (Mitsubishi)
128M Synchronous DRAM SDRAM (Rev. 1.0E) Jun. '99 MITSUBISHI LSIs M2V28S20TP-6,-7,-8 M2V28S30TP-6,-7,-7L,-8,-8L M2V28S40TP-7,-7L,-8,-8L (4-BANK x 8,.

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