* ch. The divide
* by
* A/divide
* by
* N counter latch is loaded, regardless of the contents of the control register, when ENB goes high. The data entry format is shown in Figure 1. ENB Transparent Latch Enable (PDIP, SOG
* Pin 13, SSOP
* Pin 18) A logic high o
MC145159-1 Datasheet (223.12 KB)
MC145159-1
Motorola
223.12 KB
Serial-input pll frequency synthesizer.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Serial-Input PLL Frequency Synthesizer with Analog Phase Detector
Interfaces with Dual
*Modulus Prescaler.
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