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MC88LV926 LOW SKEW CMOS PLL 68060 CLOCK DRIVER

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Description

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Skew CMOS PLL 68060 Clock Driver The MC88LV926 Clock Driver utilizes phase *locked loop technology .
of the RST_IN/RST_OUT(LOCK) Functionality The RST_IN and RST_OUT(LOCK) pins provide a 68030/040/060 processor reset function, with the RST_OUT pin als.

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Datasheet Specifications

Part number
MC88LV926
Manufacturer
Motorola
File Size
108.01 KB
Datasheet
MC88LV926_MotorolaInc.pdf
Description
LOW SKEW CMOS PLL 68060 CLOCK DRIVER

Features

* 3.3V ± 0.3V or 5.0V ±5%) Symbol tRISE/FALL1 All Outputs tRISE/FALL1 2X_Q Output tpulse width(a)1 (Q0, Q1, Q2, Q3) tpulse width(b)1 (2X_Q Output) tSKEWr1,2 (Rising) Parameter Rise/Fall Time, into 50Ω Load Rise/Fall Time into a 50Ω Load Output Pulse Width Q0, Q1, Q2, Q3 at 1.65V

Applications

* The Phase Variation From Part
* to
* Part Between SYNC and the ‘Q’ Outputs Is Less Than 600ps (Derived From the TPD Specification, Which Defines the Part
* to
* Part Skew) SYNC Input Frequency Range From 5MHZ to 2X_Q FMax/4 All Outputs Have ±36mA Drive (Equal High and Low) CM

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