* for power conscious portable or “green” designs. The power down pin will seemlessly reduce all of the clock rates by one half so that the system will run at half the potential clock rate to extend battery life. The POWER_DN pin is synchronized internally to the slowest output clock rate. This allows
MPC931
Motorola
162.59 KB
Low voltage pll clock driver.
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver The MPC930/931 is a 3.3V compatible, PLL based clock driver device targeted for h.
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