illustrated in Figure 1, makes the DSP56002 a cost-effective, high-performance solution for high-precision general purpose digital signal processing. 1
6
3
15
16-bit Bus 24-bit Bus
Program Memory 512 × 24 RAM 64 × 24 ROM (boot) X Data Memory 256 × 24 RAM 256 × 24 ROM (A-law/ µ-law) Y Data Memory 256 × 24 RAM 256 × 24 ROM (sine)
24-bit Timer/ Event Counter
Sync. Serial (SSI) or I/O
Serial Comm. (SCI) or I/O
Host Interface (HI) or I/O
24-bit 56000 DSP Core
Internal Data Bus Switch OnCE™.
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