UPD45128163

128M-bit Synchronous DRAM 4-bank/ LVTTL

NEC

UPD45128163 Features

* Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge

* Pulsed interface

* Possible to assert random column address in every cycle

* Quad internal banks controlled by BA0(A13) and BA1(A12)

* Byte control (×16) by LDQM and UDQM

UPD45128163 General Description

The µPD45128441, 45128841, 45128163 are high-speed 134,217,728-bit synchronous dynamic random-access memories, organized as 8,388,608 × 4 × 4, 4,194,304 × 8 × 4, 2,097,152 × 16 × 4 (word × bit × bank), respectively. The synchronous DRAMs achieved high-speed data transfer using the pipeline architect.

UPD45128163 Datasheet (1.08 MB)

UPD45128163 Datasheet Preview — Preview of UPD45128163 PDF

Datasheet Details

Part number:

UPD45128163

Manufacturer:

NEC

File Size:

1.08 MB

Description:

128m-bit synchronous dram 4-bank/ lvttl.

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TAGS

UPD45128163 128M-bit Synchronous DRAM 4-bank LVTTL NEC

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UPD45128163 Features

UPD45128163 General Description

Datasheet Details

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Description:

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