Description
Data Bus Buffer
The 3-state, bidirectional, eight bit Data Bus Buffer (DO-D71 of the .uPD8255 and .uPD8255A-5 can be directly interfaced to the processor's system Data Bus (DO-D7)The Data Bus Buffer is controlled by execution of IN and OUT instructions by the processor.Control Words and Status information are also transmitted via the Data Bus Buffer.Read/Write and Control Logic
This block manages all of the internal and external transfers of Data, Control and Status.Through this block, the.
Features
- unique to each of the ports. Port A = An 8-bit data output latch/buffer and data input latch. Port B = An 8-bit data input/output latch/buffer and an 8-bit data input buffer.
