UPD8255A-5 - PROGRAMMABLE PERIPHERAL INTERFACES
Data Bus Buffer The 3-state, bidirectional, eight bit Data Bus Buffer (DO-D71 of the .uPD8255 and .uPD8255A-5 can be directly interfaced to the processor's system Data Bus (DO-D7)The Data Bus Buffer is controlled by execution of IN and OUT instructions by the processor. Control Words and Status inf.
NEe Microcomputers, Inc. NE'C fLPD8255 fLPD8255A 5 PROGRAMMABLE PERIPHERAL INTERFACES D ESCR I PTI ON The IlPD8255 and IlPD8255A-5 are general purpose programmable INPUT/OUTPUT devices designed for use with the 8080A/8085A microprocessors. Twenty-four (24) I/O lines may be programmed in two groups of twelve (group I and group II) and used in three modes of operation. In the Basic mode, (MODE 0), each group of twelve I/O pins may be programmed in sets of 4 to be iniJut or output. In the S.
UPD8255A-5 Features
* unique to each of the ports.
Port A = An 8-bit data output latch/buffer and data input latch. Port B = An 8-bit data input/output latch/buffer and an 8-bit data input buffer.
