74LVC1G175 Datasheet (NXP Semiconductors)

74LVC1G175, Single D-type flip-flop

The 74LVC1G175 is a low-power, low-voltage single positive edge triggered D-type flip-flop with individual data (D) input, clock (CP) input, master reset (MR) input, and Q output.

The master reset (MR) is an asynchronous active LOW input and operates independently of the clock input.

Information on

74LVC1G175 Features

* Wide supply voltage range from 1.65 V to 5.5 V

* 5 V tolerant inputs for interfacing with 5 V logic

* High noise immunity

* Complies with JEDEC standard:

* JESD8-7 (1.65 V to 1.95 V)

* JESD8-5 (2.3 V to 2.7 V)

* JESD8B/JESD36 (2.7 V to 3.6 V).

* ESD protection: