* I I I I I I I I I I I I I I 10-bit resolution Sampling rate up to 50 MHz DC sampling allowed One clock cycle conversion only High signal-to-noise ratio over a large analog input frequency range (9.3 effective bits at 4.43 MHz full-scale input at fclk = 40 MHz) No missing codes guaranteed In-Range (I
ADC1003S050 Datasheet (172.21 KB)
ADC1003S050
NXP ↗ Semiconductors
172.21 KB
Single 10-bits adc.
ADC1003S030/040/050
Rev. 02
* 7 August 2008
www.DataSheet4U.com
Single 10 bits ADC, up to 30 MHz, 40 MHz or 50 MHz, with voltage regulator
P.
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