Description
PX1011A/PX1012A PCI Express stand-alone X1 PHY Rev.02 * 18 May 2006 Product data sheet 1.General .
The PX1011A/PX1012A is a high-performance, low-power, single-lane PCI Express electrical PHYsical layer (PHY) that handles the low level PCI Express p.
Features
* such as clock and data recovery (CDR), data serialization and de-serialization, 8b/10b encoding, analog buffers, elastic buffer and receiver detection, and provides superior performance to the Media Access Control (MAC) layer devices. The PX1011A/1012A is a 2.5 Gbit/s PCI Express PHY with 8-bit data
Applications
* with the introduction of a source synchronous clock for transmit and receive data. The 8-bit data interface operates at 250 MHz with SSTL_2 signaling. The SSTL_2 signaling is compatible with the I/O interfaces available in FPGA products. The PX1011A/1012A PCI Express PHY supports advanced power mana