UM10430 - LPC18xx ARM Cortex-M3 microcontroller
2.8 Modifications: 20151210 LPC18xx user manual * Fixed formatting issues.
* Added CREG1 register.
See Table 90 “CREG1 register (CREG1, address 0x4004 3008) bit description”.
* Updated text in Section 12.2.1 “Configuring the BASE_M3_CLK for high operating frequencies”: To
UM10430 LPC18xx ARM Cortex-M3 microcontroller Rev.
2.8 10 December 2015 User manual Document information Info Content Keywords LPC18xx, LPC1850, LPC1830, LPC1820, LPC1810, LPC185x, LPC183x, LPC182x, LPC181x, LPC18Sxx, LPC18S50, LPC18S30, LPC18S20, LPC18S10, LPC18S5x, LPC18S3x, LPC18S2x, LPC18S1x, ARM Cortex-M3, SPIFI, SCT, USB, Ethernet, LPC1800, LPC1800 User manual Abstract LPC18xx user manual NXP Semiconductors UM10430 LPC18xx User manual Revision history Rev Date Descript
UM10430 Features
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* Added the line to the remark in Section 10.4.10 “USB0 frame length adjust register” and Section 10.4.11 “USB1 frame length adjust register”: This register should be read before the initialization of USB0 and USB1.
* Fixed typographical error in Section 6.2 “Features”: Cipher-Bloc
