74ABT823 - 9-bit D-type flip-flop
The 74ABT823 Bus interface Register is designed to eliminate the extra packages required to buffer existing registers and provide extra data width for wider data/address paths of buses carrying parity.
The 74ABT823 is a 9-bit wide buffered register with Clock Enable (CE) and Master Reset (MR) which
74ABT823 Features
* High speed parallel registers with positive edge-triggered D-type flip-flops
* Ideal where high speed, light loading, or increased fan-in are required with MOS microprocessors
* Output capability: +64mA/
* 32mA
* Latch-up protection exceeds 500mA per Jedec Std