74AHC595 Datasheet - NXP

74AHC595 8-bit serial-in/serial or parallel-out shift register

74AHC595; 74AHCT595 The 74AHC/AHCT595 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard No. 7A. The 74AHC/AHCT595 is an 8-stage serial shift register with a storage register and 3-state outputs. The .

74AHC595 Features

* ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V MM EIA/JESD22-A115-A exceeds 200 V CDM EIA/JESD22-C101 exceeds 1000 V

* Balanced propagation delays

* All inputs have Schmitt-trigger actions

* Inputs accept voltages higher than VCC

* For AHC only: operat

74AHC595 Datasheet (103.31 KB)